San Jose, CA
The primary job responsibilities will be to support pre- and post-sales customer activities and communicate customer requirements to development.
A successful candidate must have the following:
• Strong knowledge of VLSI clock designs, SPICE circuit simulation, and gate-level Verilog
• BS in Electrical Engineering or Computer Science
• Minimum 4 years in EDA as applications engineer
• Good understanding of circuit and layout design
• Strong technical communication skills.
Positions are available to be filled immediately.
Comprehensive Solution for
Full Chip Clock Analysis